Do you know PCB alignment impedance matching? In high-speed PCB design, impedance matching or not is related to the quality of the signal is good or bad. Impedance matching refers to the energy transfer, the load impedance is required to be equal to the characteristic impedance of the transmission line, this time the transmission will not produce reflections, which indicates that all the energy is absorbed by the load. Conversely, there is a loss of energy in the transmission.

Here we understand the PCB design, when PCB alignment need to do impedance matching?

1. PCB alignment when need to do impedance matching?

Not mainly look at the frequency, but the key is to look at the signal edge steepness, that is, the signal rise / fall time, generally believe that if the signal rise / fall time (10% to 90%) is less than 6 times the wire delay, is a high-speed signals, must pay attention to the problem of impedance matching. Wire delay is generally taken as 150ps/inch.

2. Characteristic impedance

Signal propagation process along the transmission line, if the transmission line has a consistent speed of signal propagation everywhere, and the capacitance per unit length is the same, then the signal is always seen in the propagation process is completely consistent with the instantaneous impedance. Since the impedance remains constant over the entire transmission line, we give a specific name to this feature or characteristic of a particular transmission line and call it the characteristic impedance of that line. Characteristic impedance is the value of the instantaneous impedance seen by the signal as it propagates along the transmission line.

Characteristic impedance is related to factors such as the layer where the PCB conductor is located, the material used for the PCB (dielectric constant), the width of the alignment, the distance between the conductor and the plane, and is independent of the length of the alignment. Characteristic impedance can be calculated using software. High-speed PCB wiring, generally the alignment impedance of digital signals designed for 50 ohms, which is an approximate figure. General provisions of the coaxial cable baseband 50 ohms, frequency band 75 ohms, twisted pair (differential) for 100 ohms.

3. Common impedance matching methods

(1) series terminal matching in the signal source impedance is lower than the characteristic impedance of the transmission line under the conditions of the signal source and transmission line in series between a resistor R, so that the output impedance of the source and the characteristic impedance of the transmission line to match, inhibit the signal from the load side of the reflection back to the signal to reflect again. Matching resistor selection principle: the sum of matching resistor value and output impedance of the driver is equal to the characteristic impedance of the transmission line. The output impedance of common CMOS and TTL drivers varies with the level of the signal.

Therefore, for TTL or CMOS circuits, it is not possible to have a very correct matching resistor, only a compromise can be considered. Signal networks with chain topologies are not suitable for series termination matching; all loads must be connected to the end of the transmission line. Series matching is the most commonly used termination matching method. It has the advantage of low power consumption, does not introduce additional DC loads to the driver, does not introduce additional impedance between signal and ground, and requires only one resistive element. Common applications: general CMOS, TTL circuit impedance matching, USB signals are also sampled in this method to do impedance matching.

(2) Parallel Termination Matching In case the impedance of the signal source is very small, the input impedance of the load terminal is matched with the characteristic impedance of the transmission line by adding parallel resistors, so as to eliminate the reflection of the load terminal. The realization form is divided into two forms: single resistance and double resistance. Matching resistance selection principle: in the case of the chip’s input impedance is very high, for the single-resistor form, the load side of the shunt resistance value must be similar or equal to the characteristic impedance of the transmission line; for the double-resistor form, each shunt resistance value for the transmission line characteristic impedance of twice.

Parallel terminal matching advantage is simple and easy to implement, the obvious disadvantage is that it will bring DC power consumption: single-resistor DC power consumption is closely related to the duty cycle of the signal; double-resistor DC power consumption regardless of whether the signal is high or low level, but the current is less than half of a single-resistor way.

4. Common applications: more high-speed signal applications

(1) DDR, DDR2 and other SSTL driver. The use of single-resistor form, connected in parallel to the VTT (generally half of the IOVDD). Among them, the parallel matching resistor for DDR2 data signal is built in the chip.

(2) TMDS and other high-speed serial data interface. Using a single resistor form, in parallel to the receiving device end to IOVDD, single-ended impedance of 50 ohms (100 ohms between differential pairs).

The above is the PCB alignment to do impedance matching, I hope to give you help.

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